cordic原理与FPGA实现(3)

网友投稿 687 2022-09-28

cordic原理与FPGA实现(3)

cordic原理与FPGA实现(3)

一个Pipelined结构 16极流水线 代码如下。但是有错误在pi/2相位整数倍点多了一个毛刺 。 还请各位指正 谢谢

代码如下:

1:

1: 2: module cordic (clk,rst_n,ena,phase_in,sin_out,cos_out,eps); 3: 4: parameter DATA_WIDTH=16; 5: parameter PIPELINE=15; 6: input clk; 7: input rst_n; 8: input ena; 9: input [DATA_WIDTH-1:0] phase_in; 10: 11: output [DATA_WIDTH-1:0] sin_out; 12: output [DATA_WIDTH-1:0] cos_out; 13: output [DATA_WIDTH-1:0] eps; 14: 15: reg [DATA_WIDTH-1:0] sin_out; 16: reg [DATA_WIDTH-1:0] cos_out; 17: reg [DATA_WIDTH-1:0] eps; 18: 19: reg [DATA_WIDTH-1:0] phase_in_reg; 20: 21: reg [DATA_WIDTH-1:0] x0,y0,z0; 22: reg [DATA_WIDTH-1:0] x1,y1,z1; 23: reg [DATA_WIDTH-1:0] x2,y2,z2; 24: reg [DATA_WIDTH-1:0] x3,y3,z3; 25: reg [DATA_WIDTH-1:0] x4,y4,z4; 26: reg [DATA_WIDTH-1:0] x5,y5,z5; 27: reg [DATA_WIDTH-1:0] x6,y6,z6; 28: reg [DATA_WIDTH-1:0] x7,y7,z7; 29: reg [DATA_WIDTH-1:0] x8,y8,z8; 30: reg [DATA_WIDTH-1:0] x9,y9,z9; 31: reg [DATA_WIDTH-1:0] x10,y10,z10; 32: reg [DATA_WIDTH-1:0] x11,y11,z11; 33: reg [DATA_WIDTH-1:0] x12,y12,z12; 34: reg [DATA_WIDTH-1:0] x13,y13,z13; 35: reg [DATA_WIDTH-1:0] x14,y14,z14; 36: reg [DATA_WIDTH-1:0] x15,y15,z15; 37: 38: reg [1:0] quadrant[PIPELINE:0]; 39: 40: integer i; 41: 42: //get real quadrant and map to first_n quadrant 43: 44: always@(posedge clk or negedge rst_n) 45: begin 46: if(!rst_n) 47: phase_in_reg<=16'b0000_0000_0000_0000; 48: else 49: if(ena) 50: begin 51: case(phase_in[15:14]) 52: 2'b00:phase_in_reg<=phase_in; 53: 2'b01:phase_in_reg<=phase_in-16'h4000; //-pi/2 54: 2'b10:phase_in_reg<=phase_in-16'h8000; //-pi 55: 2'b11:phase_in_reg<=phase_in-16'hc000; //-3pi/2 56: default:; 57: endcase 58: end 59: end 60: 61: always@(posedge clk or negedge rst_n) 62: begin 63: if(!rst_n) 64: begin 65: x0<=16'b0000_0000_0000_0000; 66: y0<=16'b0000_0000_0000_0000; 67: z0<=16'b0000_0000_0000_0000; 68: end 69: else 70: if(ena) 71: begin 72: x0<=16'h4DBA; //define aggregate constant Xi=1/P=1/1.6467=0.60725 (Xi=2^7*P=8'h4D) 73: y0<=16'h0000; 74: z0<=phase_in_reg; 75: end 76: end 77: 78: //level 1 79: always@(posedge clk or negedge rst_n) 80: begin 81: if(!rst_n) 82: begin 83: x1<=16'b0000_0000_0000_0000; 84: y1<=16'b0000_0000_0000_0000; 85: z1<=16'b0000_0000_0000_0000; 86: end 87: else 88: if(ena) 89: if(z0[15]==1'b0) 90: begin 91: x1<=x0-y0; 92: y1<=y0+x0; 93: z1<=z0-16'h2000; //45deg 94: end 95: else 96: begin 97: x1<=x0+y0; 98: y1<=y0-x0; 99: z1<=z0+16'h2000; //45deg 100: end 101: end 102: 103: //level 2 104: always@(posedge clk or negedge rst_n) 105: begin 106: if(!rst_n) 107: begin 108: x2<=16'b0000_0000_0000_0000; 109: y2<=16'b0000_0000_0000_0000; 110: z2<=16'b0000_0000_0000_0000; 111: end 112: else 113: if(ena) 114: if(z1[15]==1'b0) 115: begin 116: x2<=x1-{y1[DATA_WIDTH-1],y1[DATA_WIDTH-1:1]}; 117: y2<=y1+{x1[DATA_WIDTH-1],x1[DATA_WIDTH-1:1]}; 118: z2<=z1-16'h12e4; //26deg 119: end 120: else 121: begin 122: x2<=x1+{y1[DATA_WIDTH-1],y1[DATA_WIDTH-1:1]}; 123: y2<=y1-{x1[DATA_WIDTH-1],x1[DATA_WIDTH-1:1]}; 124: z2<=z1+16'h12e4; 125: end 126: end 127: 128: //level 3 129: always@(posedge clk or negedge rst_n) 130: begin 131: if(!rst_n) 132: begin 133: x3<=16'b0000_0000_0000_0000; 134: y3<=16'b0000_0000_0000_0000; 135: z3<=16'b0000_0000_0000_0000; 136: end 137: else 138: if(ena) 139: if(z2[15]==1'b0) 140: begin 141: x3<=x2-{{2{y2[DATA_WIDTH-1]}},y2[DATA_WIDTH-1:2]}; 142: y3<=y2+{{2{x2[DATA_WIDTH-1]}},x2[DATA_WIDTH-1:2]}; 143: z3<=z2-16'h09fb; //14deg 144: end 145: else 146: begin 147: x3<=x2+{{2{y2[DATA_WIDTH-1]}},y2[DATA_WIDTH-1:2]}; 148: y3<=y2-{{2{x2[DATA_WIDTH-1]}},x2[DATA_WIDTH-1:2]}; 149: z3<=z2+16'h09fb; 150: end 151: end 152: 153: //level 4 154: always@(posedge clk or negedge rst_n) 155: begin 156: if(!rst_n) 157: begin 158: x4<=16'b0000_0000_0000_0000; 159: y4<=16'b0000_0000_0000_0000; 160: z4<=16'b0000_0000_0000_0000; 161: end 162: else 163: if(ena) 164: if(z3[15]==1'b0) 165: begin 166: x4<=x3-{{3{y3[DATA_WIDTH-1]}},y3[DATA_WIDTH-1:3]}; 167: y4<=y3+{{3{x3[DATA_WIDTH-1]}},x3[DATA_WIDTH-1:3]}; 168: z4<=z3-16'h0511; //7deg 169: end 170: else 171: begin 172: x4<=x3+{{3{y3[DATA_WIDTH-1]}},y3[DATA_WIDTH-1:3]}; 173: y4<=y3-{{3{x3[DATA_WIDTH-1]}},x3[DATA_WIDTH-1:3]}; 174: z4<=z3+16'h0511; 175: end 176: end 177: 178: //level 5 179: always@(posedge clk or negedge rst_n) 180: begin 181: if(!rst_n) 182: begin 183: x5<=16'b0000_0000_0000_0000; 184: y5<=16'b0000_0000_0000_0000; 185: z5<=16'b0000_0000_0000_0000; 186: end 187: else 188: if(ena) 189: if(z4[15]==1'b0) 190: begin 191: x5<=x4-{{4{y4[DATA_WIDTH-1]}},y4[DATA_WIDTH-1:4]}; 192: y5<=y4+{{4{x4[DATA_WIDTH-1]}},x4[DATA_WIDTH-1:4]}; 193: z5<=z4-16'h028b; //4deg 194: end 195: else 196: begin 197: x5<=x4+{{4{y4[DATA_WIDTH-1]}},y4[DATA_WIDTH-1:4]}; 198: y5<=y4-{{4{x4[DATA_WIDTH-1]}},x4[DATA_WIDTH-1:4]}; 199: z5<=z4+16'h028b; 200: end 201: end 202: 203: //level 6 204: always @(posedge clk or negedge rst_n) 205: begin 206: if(!rst_n) 207: begin 208: x6<=16'b0000_0000_0000_0000; 209: y6<=16'b0000_0000_0000_0000; 210: z6<=16'b0000_0000_0000_0000; 211: end 212: else 213: if(ena) 214: if(z5[15]==1'b0) 215: begin 216: x6<=x5-{{5{y5[DATA_WIDTH-1]}},y5[DATA_WIDTH-1:5]}; 217: y6<=y5+{{5{x5[DATA_WIDTH-1]}},x5[DATA_WIDTH-1:5]}; 218: z6<=z5-16'h0146; //2deg 219: end 220: else 221: begin 222: x6<=x5+{{5{y5[DATA_WIDTH-1]}},y5[DATA_WIDTH-1:5]}; 223: y6<=y5-{{5{x5[DATA_WIDTH-1]}},x5[DATA_WIDTH-1:5]}; 224: z6<=z5+16'h0146; 225: end 226: end 227: 228: //level 7 229: always@(posedge clk or negedge rst_n) 230: begin 231: if(!rst_n) 232: begin 233: x7<=16'b0000_0000_0000_0000; 234: y7<=16'b0000_0000_0000_0000; 235: z7<=16'b0000_0000_0000_0000; 236: end 237: else 238: if(ena) 239: if(z6[15]==1'b0) 240: begin 241: x7<=x6-{{6{y6[DATA_WIDTH-1]}},y6[DATA_WIDTH-1:6]}; 242: y7<=y6+{{6{x6[DATA_WIDTH-1]}},x6[DATA_WIDTH-1:6]}; 243: z7<=z6-16'h00a3; //2deg 244: end 245: else 246: begin 247: x7<=x6+{{6{y6[DATA_WIDTH-1]}},y6[DATA_WIDTH-1:6]}; 248: y7<=y6-{{6{x6[DATA_WIDTH-1]}},x6[DATA_WIDTH-1:6]}; 249: z7<=z6+16'h00a3; 250: end 251: end 252: //level 8 253: 254: always @(posedge clk or negedge rst_n) 255: begin 256: if(!rst_n) 257: begin 258: x8<=16'b0000_0000_0000_0000; 259: y8<=16'b0000_0000_0000_0000; 260: z8<=16'b0000_0000_0000_0000; 261: end 262: else 263: if(ena) 264: if(z7[15]==1'b0) 265: begin 266: x8<=x7-{{7{y7[DATA_WIDTH-1]}},y7[DATA_WIDTH-1:7]}; 267: y8<=y7+{{7{x7[DATA_WIDTH-1]}},x7[DATA_WIDTH-1:7]}; 268: z8<=z7-16'h0051; //2deg 269: end 270: else 271: begin 272: x8<=x7+{{7{y7[DATA_WIDTH-1]}},y7[DATA_WIDTH-1:7]}; 273: y8<=y7-{{7{x7[DATA_WIDTH-1]}},x7[DATA_WIDTH-1:7]}; 274: z8<=z7+16'h0051; 275: end 276: end 277: 278: 279: //level 9 280: always@(posedge clk or negedge rst_n) 281: begin 282: if(!rst_n) 283: begin 284: x9<=16'b0000_0000_0000_0000; 285: y9<=16'b0000_0000_0000_0000; 286: z9<=16'b0000_0000_0000_0000; 287: end 288: else 289: if(ena) 290: if(z8[15]==1'b0) 291: begin 292: x9<=x8-{{8{y8[DATA_WIDTH-1]}},y8[DATA_WIDTH-1:8]}; 293: y9<=y8+{{8{x8[DATA_WIDTH-1]}},x8[DATA_WIDTH-1:8]}; 294: z9<=z8-16'h0029; //2deg 295: end 296: else 297: begin 298: x9<=x8+{{8{y8[DATA_WIDTH-1]}},y8[DATA_WIDTH-1:8]}; 299: y9<=y8-{{8{x8[DATA_WIDTH-1]}},x8[DATA_WIDTH-1:8]}; 300: z9<=z8+16'h0029; 301: end 302: end 303: 304: //level 10 305: always@(posedge clk or negedge rst_n) 306: begin 307: if(!rst_n) 308: begin 309: x10<=16'b0000_0000_0000_0000; 310: y10<=16'b0000_0000_0000_0000; 311: z10<=16'b0000_0000_0000_0000; 312: end 313: else 314: if(ena) 315: if(z9[15]==1'b0) 316: begin 317: x10<=x9-{{9{y9[DATA_WIDTH-1]}},y9[DATA_WIDTH-1:9]}; 318: y10<=y9+{{9{x9[DATA_WIDTH-1]}},x9[DATA_WIDTH-1:9]}; 319: z10<=z9-16'h0014; //2deg 320: end 321: else 322: begin 323: x10<=x9+{{9{y9[DATA_WIDTH-1]}},y9[DATA_WIDTH-1:9]}; 324: y10<=y9-{{9{x9[DATA_WIDTH-1]}},x9[DATA_WIDTH-1:9]}; 325: z10<=z9+16'h0014; 326: end 327: end 328: 329: //level 11 330: always@(posedge clk or negedge rst_n) 331: begin 332: if(!rst_n) 333: begin 334: x11<=16'b0000_0000_0000_0000; 335: y11<=16'b0000_0000_0000_0000; 336: z11<=16'b0000_0000_0000_0000; 337: end 338: else 339: if(ena) 340: if(z10[15]==1'b0) 341: begin 342: x11<=x10-{{10{y10[DATA_WIDTH-1]}},y10[DATA_WIDTH-1:10]}; 343: y11<=y10+{{10{x10[DATA_WIDTH-1]}},x10[DATA_WIDTH-1:10]}; 344: z11<=z10-16'h000a; //2deg 345: end 346: else 347: begin 348: x11<=x10+{{10{y10[DATA_WIDTH-1]}},y10[DATA_WIDTH-1:10]}; 349: y11<=y10-{{10{x10[DATA_WIDTH-1]}},x10[DATA_WIDTH-1:10]}; 350: z11<=z10+16'h000a; 351: end 352: end 353: 354: //level 12 355: always@(posedge clk or negedge rst_n) 356: begin 357: if(!rst_n) 358: begin 359: x12<=16'b0000_0000_0000_0000; 360: y12<=16'b0000_0000_0000_0000; 361: z12<=16'b0000_0000_0000_0000; 362: end 363: else 364: if(ena) 365: if(z11[15]==1'b0) 366: begin 367: x12<=x11-{{11{y11[DATA_WIDTH-1]}},y11[DATA_WIDTH-1:11]}; 368: y12<=y11+{{11{x11[DATA_WIDTH-1]}},x11[DATA_WIDTH-1:11]}; 369: z12<=z11-16'h0005; //2deg 370: end 371: else 372: begin 373: x12<=x11+{{11{y11[DATA_WIDTH-1]}},y11[DATA_WIDTH-1:11]}; 374: y12<=y11-{{11{x11[DATA_WIDTH-1]}},x11[DATA_WIDTH-1:11]}; 375: z12<=z11+16'h0005; 376: end 377: end 378: 379: //level 13 380: always@(posedge clk or negedge rst_n) 381: begin 382: if(!rst_n) 383: begin 384: x13<=16'b0000_0000_0000_0000; 385: y13<=16'b0000_0000_0000_0000; 386: z13<=16'b0000_0000_0000_0000; 387: end 388: else 389: if(ena) 390: if(z12[15]==1'b0) 391: begin 392: x13<=x12-{{12{y12[DATA_WIDTH-1]}},y12[DATA_WIDTH-1:12]}; 393: y13<=y12+{{12{x12[DATA_WIDTH-1]}},x12[DATA_WIDTH-1:12]}; 394: z13<=z12-16'h003; //2deg 395: end 396: else 397: begin 398: x13<=x12+{{12{y12[DATA_WIDTH-1]}},y12[DATA_WIDTH-1:12]}; 399: y13<=y12-{{12{x12[DATA_WIDTH-1]}},x12[DATA_WIDTH-1:12]}; 400: z13<=z8+16'h003; 401: end 402: end 403: //level 14 404: always@(posedge clk or negedge rst_n) 405: begin 406: if(!rst_n) 407: begin 408: x14<=16'b0000_0000_0000_0000; 409: y14<=16'b0000_0000_0000_0000; 410: z14<=16'b0000_0000_0000_0000; 411: end 412: else 413: if(ena) 414: if(z13[15]==1'b0) 415: begin 416: x14<=x13-{{13{y13[DATA_WIDTH-1]}},y13[DATA_WIDTH-1:13]}; 417: y14<=y13+{{13{x13[DATA_WIDTH-1]}},x13[DATA_WIDTH-1:13]}; 418: z14<=z13-16'h0001; //2deg 419: end 420: else 421: begin 422: x14<=x13+{{13{y13[DATA_WIDTH-1]}},y13[DATA_WIDTH-1:13]}; 423: y14<=y13-{{13{x13[DATA_WIDTH-1]}},x13[DATA_WIDTH-1:13]}; 424: z14<=z13+16'h0001; 425: end 426: end 427: //level 15 428: always@(posedge clk or negedge rst_n) 429: begin 430: if(!rst_n) 431: begin 432: x15<=16'b0000_0000_0000_0000; 433: y15<=16'b0000_0000_0000_0000; 434: z15<=16'b0000_0000_0000_0000; 435: end 436: else 437: if(ena) 438: if(z14[15]==1'b0) 439: begin 440: x15<=x14-{{14{y14[DATA_WIDTH-1]}},y14[DATA_WIDTH-1:14]}; 441: y15<=y14+{{14{x14[DATA_WIDTH-1]}},x14[DATA_WIDTH-1:14]}; 442: z15<=z14-16'h0001; //2deg 443: end 444: else 445: begin 446: x15<=x14+{{14{y14[DATA_WIDTH-1]}},y14[DATA_WIDTH-1:14]}; 447: y15<=y14-{{14{x14[DATA_WIDTH-1]}},x14[DATA_WIDTH-1:14]}; 448: z15<=z14+16'h0001; 449: end 450: end 451: 452: 453: always@(posedge clk or negedge rst_n) 454: begin 455: if(!rst_n) 456: for(i=0;i<=PIPELINE;i=i+1) 457: quadrant[i]<=2'b00; 458: else 459: if(ena) 460: begin 461: for(i=0;i

OPTIMISM, PASSION & HARDWORK

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